Wraps the pyslang compiler frontend so AI agents can query parsed and elaborated Verilog and SystemVerilog projects instead of grepping plain text. Exposes tools to load filelists or explicit files, retrieve compiler diagnostics, list modules and interfaces, walk instance hierarchies, and find symbol declarations and references. Handles include directories, defines, nested filelists, and generate blocks the way a real compiler does. Meant for triaging parse errors, checking what a filelist expands to, getting hierarchy context for debug prompts, or finding declarations without chasing stale comments. Read-only and project-root scoped. Not a simulator, linter replacement, or refactoring tool. Good when you need semantic structure, not when you just want to search a few lines of RTL.
claude mcp add --transport stdio ariklapid-pyslang-mcp uvx pyslang-mcp